The present application relates to semiconductor technology, and more particularly, to a method of forming a semiconductor structure containing at least one silicon germanium alloy fin structure that has a high percentage of germanium and located on a surface of an insulator layer.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continue scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that MOSFETs are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
The use of non-planar semiconductor devices such as, for example, semiconductor fin field effect transistors (FinFETs), is the next step in the evolution of complementary metal oxide semiconductor (CMOS) devices. Semiconductor FinFETs can achieve higher drive currents with increasingly smaller dimensions as compared to conventional planar FETs.
In such FinFET devices, a fin containing a silicon germanium alloy is one promising channel material because of its high-carrier mobility. Silicon germanium alloy fins can be formed by epitaxially growing a silicon germanium alloy layer on a surface of a silicon (Si) substrate and then patterning the silicon germanium alloy layer. This prior art method of forming silicon germanium alloy fins has some drawbacks associated therewith. For example, the direct epitaxial growth of a silicon germanium alloy on a Si substrate has a critical thickness limit. Above the critical thickness, silicon germanium is very defective and is not suitable for use as a device channel material. This prevents a thick silicon germanium alloy layer for high fin heights. Moreover, this approach is not scalable for silicon germanium alloy fins having a high (i.e., greater than 70 atomic %) germanium content. Such silicon germanium alloy fins are also formed on a silicon substrate. For future technology nodes, it oftentimes required that the silicon germanium alloy fin be present on an insulator layer, rather than a silicon substrate.
In view of the above, there is a need for providing a method of forming a silicon germanium alloy fin having a high germanium content, a low defect density, and a high relaxation value and on a surface of an insulator layer.